The focus here is the ``Silicon Cortex'' analog VLSI chip developed by the ETH/UZ group. This is a general network of cortical-like neurons which can be used to implement real-time models of cortical processing. The silicon cortex provides a general infrastructure for communication between many computational nodes such as the somata and synapses of silicon neurons. Communication is via action potential-like ``Event Addresses'' [. Douglas VLSI 1995, Douglas intro 1995.]. The present silicon cortex is designed to support a few thousand spiking neurons, and can accept input from external sensory sources, or direct output to effectors that use the Event Address Protocol. We are presently testing the connection between a ``neuromorphic'' silicon retina and the silicon cortex. We propose to explore the use of existing aVLSI silicon cochleas [.Sarpeshkar 1996.] and models of auditory brainstem processing [. Lazzaro 1994.] as input to the silicon cortex, and so attempt a simple aVLSI implementation of AI processing.