(Leader: Hubbard)
There are a number of paths towards the implementation of auditory models. In general, our goal concerning implementation is to produce a prototype of a product or to increase computational speed in order to expedite our scientific study. Analog realizations are often appropriate to realizing auditory models. The analog realizations can take the form of discrete component designs, mixed discrete and integrated circuitry, or full custom (VLSI) chip design. Of these, we have recently found that discrete realizations can be an extremely productive path to prototypes, while the VLSI approach poses numerous challenges. Digital realizations include computer simulations, digital signal processing (DSP), and full custom digital VLSI design. All of these approaches are relatively straightforward. Simulation is easiest, but ultimately we find that today's computers are still woefully slow or, if fast enough, too costly. The DSP approach by which one designs using a development ``kit'' that is specialized for a particular signal processing chip family can often approach or meet real-time computing constraints, especially in the case of low-frequency signals. Digital VLSI is similarly a convenient and well worked out approach especially when combined with such digital design techniques as VHDL.
A number of VLSI approaches to implementing auditory structures have been tried. Mead, Lyon, Lazzaro, and Sarpeshkar have implemented a collection [.Lazzaro 1994, Sarpeshkar 1996, Mead Lazzaro 1990.] of cochlear chips, principally using the subthreshold analog VLSI design style. These workers at present have implementations of the entire auditory periphery including the auditory nerve. Shamma and his co-workers have implemented a 32 channel cochlear filter model using newly patented supra-threshold mixed analog-digital switched-capacitor technology [.Lin Shamma 1994.]. These designs require much less silicon area than traditional switched capacitor methods, and can be very accurately controlled and fabricated.
Our overall objective is to build hardware prototypes of auditory models for all stages of processing. Once tested and proven useful, full implementations can proceed based on the most appropriate technology. The prototypes can take various forms depending on the stage of development. For instance, breadboarding using standard electronic parts such as operational amplifiers and passive elements can very quickly produce a working prototype. The DSP approach allows for algorithm development, which can itself be simulated, and basically guaranteed to evolve into a working prototype. This type of prototype is likely reasonably close to product form. The VLSI approach is clearly the most difficult, but necessary in instances when DSP does not afford needed speed or in certain cases, low power requirements.